PCI Express (PCIe) is a standards-based, point-to-point, serial interconnect used throughout the computing and embedded devices industries. Introduced in 2004, PCIe is managed by the PCI-SIG. PCIe is capable of the following:
-Scalable, simultaneous, bi-directional transfers using one to 32 lanes of differential-pair interconnects
-Grouping lanes to achieve high transfer rates, such as with graphics adapters -Up to 32 GB/s of bi-directional bandwidth on a x16 connector with PCI Express 3.0
-Low-overhead, low-latency data transfers
-Both host-directed and peer-to-peer transfers Emulation of network environments by sending data between two points without host-chip routing
PCI Express (PCIe) is the interconnect of choice because of its low cost, high
performance, and flexibility. Maintaining software compatibility with the
previous PCI interconnect, PCIe enables many benefits not possible with PCI,
including: -Scalable performance by grouping lanes together (one to 32) -Lower cost, simpler implementations with its low pin counts -Improved power management capabilities -Ubiquity and flexibility – it’s widely used in a wide range of
applications
A PCI Express (PCIe) ‘link’ comprises from one to 32 lanes. Links are expressed as x1, x2, x4, x8, x16, etc. The link is negotiated and configured on power up. More lanes deliver faster transfer rates; most graphics adapters use at least 16 lanes in today’s PCs. The clock is embedded in the data stream, allowing excellent frequency scaling for scalable performance.PCIe 3.0, continues to scale with the demands of computing applications and delivery of higher performance processors. It remains central in both systems and devices, including servers, desktops, laptops, embedded solutions, add-on cards, and chipsets. Low latency makes it ideal as an interconnect throughout clustered systems making up the internet cloud.
